VLSI + Machine Learning Research Papers

PD Concepts | 17 April 2018

This page contains a collection of research work that solve problems related to VLSI Logic Design, Physical Design, Synthesis and Verification using Machine Learning. Feel free to add a paper or an article by commenting below so that I will include it here.

Timing

Macro Placement

Routing

Signoff

General

Hardware Implementation

FPGA

CAEML

In case if you found something useful to add to this article or you found a bug in the code or would like to improve some points mentioned, feel free to write it down in the comments. Hope you found something useful here.

Happy learning!