Very Large Scale Integrated (VLSI) Physical Design is about transforming a circuit description into a physical layout (geometric description) which includes the position of cells and interconnections between them. In this page, I will be updating resources related to VLSI Physical design such as blog posts, books, courses, videos etc which will be useful for beginners, working professionals and enthusiasts interested in this field.
- Hierarchical physical design - issues and methodologies
- Hierarchical timing concepts
- Hierarchical timing analysis - Pros, cons, and a new approach
- Basics of multi-cycle & false paths
- Floorplanning - concept, challenges, and closure
- Parasitic extraction must solve advanced node issues
- CMOS Depletion-mode technology holds many advantages
- SoC Functional verification flow
- Design planning for large SoC implementation at 40nm - Part 1
- Design planning for large SoC implementation at 40nm - Part 2
- The future of IC design
- SoC PDN challenges and solutions
- Timing closure in multi-level partitioned SoCs
- Reducing IC power consumption: Low-power design techniques
- Aspects of IC power dissipation
- Estimate power at RTL to identify problems early
- Methodology improves SoC power grids
- VLSI Expert
- VLSI Junction
- VLSI Pro
- VLSI Universe
- VLSI Backend
- VLSI SoC Design
- Mantra VLSI
- VLSI System Design
- VLSI Basics
- Signoff Semiconductors Blog
- Design Reuse
- ASIC-System on Chip-VLSI Design
- EDN Network
- Semiconductor Engineering
- VLSI Physical Design notes
- Static Timing Analysis for Nanometer Designs: A Practical ApproachJayaram Bhasker and Rakesh Chadha.
- Algorithms for VLSI Physical Design AutomationNaveed Shervani, Kluwer Academic Publisher, Second edition.
- Algorithm and Data Structures for VLSI DesignChristophn Meinel & Thorsten Theobold, KAP, 2002.
- Evolutionary Algorithm for VLSIRolf Drechsheler, Second edition.
- Algorithms for VLSI Design AutomationSabih H.Gerez, John Wiley & Sons, 2007.
- Practical Problems in VLSI Physical Design AutomationSung Kyu Lim.
- Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC)Gangadharan, Sridhar, Churiwala, Sanjay.
- Routing Congestion in VLSI Circuits - Estimation and OptimizationSaxena, Prashant, Shelar, Rupesh S., Sapatnekar, Sachin
- The Simple Art of SoC Design Closing the Gap between RTL and ESLKeating, Synopsys Fellow, Michael
- Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®Bhatnagar, Himanshu
- ASIC Design Flow - Ravi S VIT University.
- Introduction to Digital VLSI Design Flow - Dr. Santosh Biswas, IIT Guwahati.
- VLSI - LEPROFESSEUR.
- Introduction to Logic Synthesis - Dr. Chandan Karfa, IIT Guwahati.
- Advanced Logic Synthesis - Dhiraj Taneja, Broadcom, Hyderabad.
- Introduction to Physical Synthesis - Dr. Chandan Karfa, IIT Guwahati.
- Static Timing Analysis - Mr.Tuhin Subhra Chakraborty, IIT Kharagpur.
- Static Timing Analysis - Concepts - LEPROFESSEUR.
- Static Timing Analysis - Concepts and Flow - Dhiraj Taneja, Broadcom, Hyderabad.
- VLSI Physical Design - Professor Indrani Sengupta, IIT Kharagpur.
- Floor Planning, Power Supply and Grounding
- Physical Design Automation
- Physical Design Automation
- Clock Skew VLSI Expert
- Signal Integrity
- Low Power Design
- Dr.John Reuben
- VLSI Physical Design - Prof. Indranil Sengupta, IIT Kharagpur.
- VLSI CAD Part I - Logic
- VLSI CAD Part II - Layout
- VSD - Physical Design Flow
- VSD - Circuit Design and SPICE Simulations - PART 1
- VSD - Circuit Design and SPICE Simulations - PART 2
- VLSI - Essential Concepts and Detailed Interview guide
- VSD - Static Timing Analysis - Part 1
- VSD - Static Timing Analysis - Part 2
- VSD - Signal Integrity
- VSD - Clock Tree Synthesis - Part 1
- VSD - Clock Tree Synthesis - Part 2
- VSD - A complete guide to install open-source EDA tools
- VSD - Tcl programming from Novice to Expert - Part 1
- VSD - Tcl programming from Novice to Expert - Part 2
- VSD - Custom Layout
In case if you found something useful to add to this article or you found a bug in the code or would like to improve some points mentioned, feel free to write it down in the comments. Hope you found something useful here.